SST V12.0.0 Release Notes
The changes in v12.0.0 of the Structure Simulation Toolkit (SST) are divided into three areas: general, PDES-core and integrated elements.
General:
- The SST contributing guide has been updated to provide more detail on the SST Core development and contribution process
- To enable future improvements in parsing, configuring, and error checking, SST 11.0 introduced naming conventions for various items that require names. In general, names must be legal Python variables. Violating these conventions generates warnings in SST v12.x and they will be enforced in SST 13.0.0. A detailed description of the new naming conventions can be found here.
- SST 12 is supported on Apple Silicon
- Top-level metadata files (LICENSE, README, INSTALL, etc.) are now Markdown rather than raw text.
Deprecation and Removal Notices:
- SimpleSimulation has been removed from this release.
- Support for Zoltan is removed
- Pin 2.14 is no longer distributed by Intel. Elements relying on this version of Pin (i.e., Balar, some features of Ariel and Prospero) continue to work but are deprecated and replacement functionality is under development.
SST-Core (PDES-Core):
- Simulation configuration input and output changes
- Initial support for JSON input files as an optional alternative to Python. JSON does not yet support Statistics configuration.
- Ability to load simulation configurations in parallel with per-rank configuration files (JSON and Python)
- Added parallel output for configuration files (JSON and Python)
- The
SST::Interfaces::StandardMem interface is no longer experimental and has been moved into the regular SST namespace
- Added
find_map() and find_set() to the Params class, supporting passing of Maps and Sets as parameter values in configuration files
- Improved error messages when an element library fails to load
- Added checks for valid names for parameters, ports, subcomponent slots, and component names. These are based on the naming conventions introduced in SST 11.0.0 and will become errors in SST 13.0.0.
- Changed event delivery ordering within a given time and priority. Events with the same delivery time will now be delivered based on the alphabetized order of the name of the link they were sent on. This ensures configurations loaded in parallel and serial produce identical ordering. Users may observe some deviation from SST 11 behavior as a result.
- Fixes for supporting Core timebases larger than 1ns.
- Deprecation
- SharedRegions are removed in favor of SharedObjects
- NullEvent has been moved to the Core’s private API and EmptyEvent has been introduced in its place
Params::find_scoped_params and Params::find_prefixed_params are removed in favor of Params::get_scoped_params(). The new function allows only a dot (.) as the scoping delimeter.- Zoltan partitioner is removed
- Outputting a configuration to XML is removed; Python and JSON are supported instead
Simulation::getSimulation() is deprecated and the public parts of the Simulation class’ API have been moved to the Element (Component, SubComponent, etc.) base classes.
- Experimental
- Support for profiling performance has been added to the core. This support is still under development and subject to change. It can be enabled using the configuration options:
--enable-perf-tracking and --enable-profile
SST-Elements:
- Updated build system to correctly inherit flags from SST Core and prevent overwriting of user-supplied flags.
- All elements were updated to adhere to the new naming conventions
- Ariel
- Switched to use
SST::Interfaces::StandardMem rather than SST::Interfaces::SimpleMem
- Added testing for multi-level memory support
- Updated pintool for Pin 3.22
- Balar
- Switched to use
SST::Interfaces::StandardMem rather than SST::Interfaces::SimpleMem
- CramSim
- Minor fixes and corrected parameter documentation
- Juno
- Switched to use
SST::Interfaces::StandardMem rather than SST::Interfaces::SimpleMem
- MemHierarchy
- Fully switched to the SST Core StandardMem interface and all CPU models in SST-Elements have likewise switched over
- Several bug fixes
- Minor performance improvements
- Added support for coherent devices
- Merlin
- Refactored bridge component to fix linking error on OSX 12.2
- Miranda
- Switched to use
SST::Interfaces::StandardMem rather than SST::Interfaces::SimpleMem
- Prospero
- Switched to use
SST::Interfaces::StandardMem rather than SST::Interfaces::SimpleMem
- rdmaNic
- New library with a NIC model that performs RDMA
- Integrates with memHierarchy and Vanadis via StandardMem
- Samba
- Added Samba.SimpleTLB which provides a basic TLB mapping
- Internal development on a virtual memory implementation supporting Vanadis, MemHierarchy, and other models has begun
- Vanadis
- Significant development since SST 11.1
- Added 64b RISC-V ISA
- Reorganized OS model to support processes
- Supports C binaries
- Limited support for C++ binaries (depends on which runtime features are used)
- Performance improvements for resolving pipeline dependencies
SST-Macro:
- Added support for Linux/OSX on Arm architectures
- Now compiles against recently released C++ standard library implementations
- Bug fixes and usability improvements in compiler wrappers used for workload generation
Known Issues (see open issues for repos):
Known incompatibilities:
- PIN
- Ariel Element requires PIN
- Prospero’s trace generator requires PIN
- memHierarchy’s Sieve component requires Ariel (and by extension, PIN)
- Balar Element requires PIN 2.14 (see note below)
- PIN 2.14
- PIN 2.14 is no longer distributed by Intel. SST support for PIN 2.14 is deprecated and replacement functionality is under development.
- PIN 2.14 is only supported on gcc 4.9 or earlier.
- SST-12 does not support PIN 2.14 on OSX platforms
- PIN 3.22
- Balar will not run on PIN 3.22; it will only support PIN 2.14
- SST-12 does not yet support PIN 3.22 on OSX platforms
- Sirius Element (Zodiac 27 Feature) does not support serialization
- Balar Element does not run on OSX (NO PIN SUPPORT)
- Element tests with too few components are not run in parallel (e.g., a test with one component is not run in our multi-threaded or multi-rank tests).
Operating System / Compiler Combinations:
Release V12.0.0 (core and elements, including macro) has been built and tested with the following OS/compiler combinations.
- CentOS 7.7 with GCC 4.8.5
- SNL RedHat 7.7 with GCC 4.8.5
- SNL RedHat 8 with GCC 8.3.1
- TOSS 4.3-4 with GCC 8.5.0
- Ubuntu 20.04 LTS (64-bit) with GCC 9.3.0
- Ubuntu 22.04 LTS (64-bit) with GCC 11.2
- Mac OSX 11.6 (Big Sur) with XCode 12.5 (Intel)(LLVM)
- Mac OSX 11.6 (Big Sur) with XCode 13 (Intel)(LLVM)
- Mac OSX 11.6 (Big Sur) with XCode 13 (ARM)(LLVM)
- Mac OSX 12.2 (Monterey) with XCode 13 (Intel)(LLVM)
External Components:
External components and the compatible version numbers are listed below. Other versions may work, but these have been tested with this release.
- Required
- Recommended
- OpenMPI 4.0.5 (SST No longer supports OpenMPI V2)
- Optional
- DRAMSim2 2.2.2
- DRAMsim3 1.0.0
- NVDimmSim 2.0.0
- HybridSim 2.0.1
- Intel Pin Tool 2.14-71313 - Pin 2.14 support is deprecated and Intel no longer distributes this version.
- Intel Pin Tool 3.17
- HDF5 1.10.5 or greater
- Goblin HMC Simulator Version:sst-8.0.0-release
- HBM Dramsim2 Version:hbm-1.0.0-release
- Ramulator SHA 7d2e723
- Nvidia CUDA SDK 8.0.61/9.1.45 (For Balar Component)
- sst-gpgpusim-external (v1.1)
Elements not in release:
Although available from the devel and master branches, the following elements are not provided in this release:
- GNA
- llyr
- Opal
- Serrano
- SimpleSimulation
Fixed Issues and Significant Code Changes (Pull Requests) in this Release:
- 739 Event processing optimizations
- 745 Only get dlerror output from attempt to laod .dylib on OSX
- 746 Always output dlerror when .so load fails
- 748 Config output updates
- 749 Move StandardMem out of experimental
- 751 Adding JSON model reader infrastructure
- 753 Missing target link library in latest changes
- 757 Add parallel load
- 759 Fixed parallel-load/ouput features for case where build is configured…
- 767 Added ability to have maps and sets as params
- 769 Parallel JSON Writer Aborts Without File Extension
- 770 JSON Writer Generates Erroneous Link Configurations
- 776 Global param ordering fix
- 777 JSON files corresponding to rank without components or links do not write component or link tags
- 778 Outputting empty components and links for ranks that do not have components and/or links
- 779 Improved the error message printed when a library fails to load.
- 782 Replace shell command with native python for diffing files
- 783 Added checks for valid names for links and components.
- 787 Added param, port and slot name checking.
- 791 Streamlining the interface to Perf counters by removing redundant registerClockHandler call
- 792 Tweaked ConfigGraph data structure and added splitGraph()
- 795 Changed how activities get ordered based on the links they’re sent on.
- 799 Updates to statistics.
- 807 Fix crashes in normal builds
- 810 Remote link changes
- 811 Removed deprecated functions for the SST 12 release.
- 814 Cleaned up Activity class
- 815 Removed zoltan partitioner
- 818 Deprecated Simulation::getSimulation()
- 826 Recurse subcomponents
- 830 Deprecation cleanup
- 834 Fix compile warnings, deprecate SimpleMem
- 1694 C++ Hello World Iostream Hangs
- 1667 SST-elements: prefetch latency is not recorded (bug)
- 1734 memH: fix mmap based backing to memory_file
- 1737 memH: Bug fix for incorrect prefetch latency statistics
- 1739 Initial Import of RISC-V Decoder for Vanadis and Improvement in Pipeline Models
- 1740 memH: fix; memNIC sources/destinations params
- 1742 Vanadis - overhaul how instructions are passed to pipeline for speculative instructions
- 1744 Adds support for additional RVC instructions in Vanadis
- 1747 Missing header in firefly/nic.cc
- 1750 Vanadis: switch over to StandardMem interface from SimpleMem
- 1753 Fix Up Immediate Decoding for RVC in Vanadis
- 1755 Improve Debugging Prints for Micro-ops in Vanadis
- 1756 Fixes Initial Stack Layout Bugs for RISC-V 64b
- 1757 Update Vanadis to Overhaul Store-Conditionals and Initial Implementation of RISCV OS Handler
- 1758 memH: Add ability for devices to issue coherent accesses with a cache
- 1760 Fix RVC Decoder Bugs for Immediates in Vanadis
- 1762 Fix for Decoder Bugs on Vanadis
- 1763 Propagate 64b support to emulated OS in Vanadis
- 1766 Add Modulo Micro-Op and Improve Decoder Generation for RISC-V Vanadis
- 1767 [RISCV64] Return Fetching PC + 2 Instead of RA
- 1768 Provide Option in RISCV Decoder to Halt on Decode Fault
- 1769 Additional RISCV Instruction Support
- 1770 Switch FP Compare for MIPS to Special Micro-Op in Vanadis
- 1771 Fix memH data writes during init, fix balar ref file
- 1772 Replaces signed/unsigned checks in Branch Micro-ops with Template in Vanadis
- 1773 Update GPR to FP Register Conversion Instructions for Vanadis
- 1774 Added component Samba.SimpleTLB
- 1778 memH: Add more data value debug output
- 1789 Enable Floating-Point Flags in Vanadis
- 1791 memH: Bug fixes and updates
- 1793 Vanadis riscv
- 1794 Vanadis Update to Enhance Floating Point Flag Support
- 1795 Vanadis Update to Migrate DIVMOD and MOD Micro-Ops to More Efficient Code Generation
- 1797 More fixes to match new naming conventions
- 1801 Fixed parameter names to conform to new naming convention.
- 1804 memH: Add missing writeback of dirty data
- 1806 memH: Fix error in generating read response payload
- 1808 memH: Use correct address in memory controller backing store for Write
- 1816 Add store buffer to Vanadis
- 1818 New event ordering
- 1820 Rdma nic final
- 1821 memH: Fix directory/mem interaction
- 1823 Prospero updates
- 1826 fix configure reporting for llvm
- 1828 miranda & memH StdMem updates
- 1830 Update OS Calls for RISC-V Vanadis
- 1831 StdMem updates to Ariel, MemH/StreamCPU, Balar, GNA
- 1834 Add Support for Fence Instructions in Vanadis
- 1836 ecall Instruction (riscv) – 93 (exit)
- 1837 Added exit syscall for riscv
- 1839 fix for risc syscall codes
- 1841 elements should get CXX from sst-config, not environment
- 1843 Prevent overwriting of user flags; ensure compilers and flags inherit from sst-core
- 1846 simpleElementExample basicStatistics has typo in option name
- 1847 Component c’tor now needs an argument
- 1851 Fix for RX Op Value in default params
- 1853 Fix for pin2 flags
- 1859 Minor Vanadis I/O Fixes
- 1861 Fix Vanadis I/O open system call
- 1863 Ariel: Update for Pin 3.22
- 1865 Add RDMA queue destroy support
- 1867 Renamed top level text files to be .md files.
- 1876 Adding Vanadis OS support for read/readv/unlink/unlinkat
- 1878 Updated all modules to use the new templated module load and ELI
- 1879 Move code that loads the elf text/data/appEnvironmentData from Vanadis component to OS component
- 1883 CramSim Test TxnGen fails
- 565 MVAPICH build with SST/macro fails
- 644 Macro std::thread replacement fails with newer libc++
- 654 sstcc is broken
- 655 Add sstcc test to make installcheck
- 658 Fix m1
- 659 Fix arm64 fcontext assembly, disable unneeded x86-dependent event managers
- 660 Compier Wrapper Problem (sstcc and sst++)
- 663 Fix sstcc
- 665 MPI_Reduce algorithm
- 666 sstcc/sst++ unicode to ascii conversion errors
- 667 Fix random encoding problem while creating “bash wrapper”
- 670 remove linkMap.h header (not used)
- 673 Disabled std::thread replacement. Addresses issue #644
- 674 TERMINATED error on “make check”
