The Structural Simulation Toolkit
Using the supercomputers of today to build the supercomputers of tomorrow
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Ariel is a processor core emulation component which dynamically streams instructions from a running application (via a UNIX-pipe based connection to a PIN-tool based profiling session). As instructions arrive at the processor core they generate memory read/write requests which are then forwarded to a memInterface-based memory hierarchy (e.g. memHierarchy). The design of Ariel allows for multiple memory pools to be present in the system including pools with differing memory bandwidths or performance characteristics (e.g. a DRAM pool and an Flash-memory pool).
The Ariel application connector currently runs in one of two modes:
Simple Front End which allows serial, OpenMP or pthread-enabled applications to have the instructions emulated from each thread on a simulated processor core. In simple mode the application cannot select which memory pools malloc/new requests are selected from although the simulation itself may have multiple memory pools. In this configuration the Ariel memory manager will just use a single memory pool and allocate free pages in the order they appear in the free list.
Multi-Level Memory Front End which allows serial, OpenMP or pthread-enabled applications to have instructions emulated from each thread and to have malloc/new memory requests directed to specific pools in the memory hierarchy. The selection of memory pools is enabled via a specialized Ariel API that is intercepted by the front end and encoded for the Ariel simulation core via specialized instruction codes in the instruction stream.
Applications executed using Ariel can be compiled with any X86 or X86-64 compatible compiler including GNU, Intel, PGI, Oracle or LLVM with routine testing being applied to the GNU and LLVM toolchains. OpenMP runtimes from GNU and Intel have both previously been tested. Users can also build their application with any specialized optimization or instruction set flags (e.g. SSE, AVX, AVX-2) as required, the front ends will correctly interpret the memory requests and encode these for the emulation core.
A sample input configuration is provided at Ariel Simple Front End STREAM example. This configuration runs a small OpenMP-based memory bandwidth (STREAM) application trapping memory requests and forwarding these for simulation. Only a single level of memory is supported as the example uses the simple front end. At this time the multi-level memory front end is being developed for publication and will be made available after this work is accepted.