SST
14.1.0
StructuralSimulationToolkit
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Understanding the performance of large-scale, capability-class , high performance computing (HPC) systems is possibly the most significant challenge in the development of such a system. Because it is impractical to construct prototype systems for evaluation at the desired scale, architects must turn to analytical models and simulation to guide design decisions. Historically, the architecture community has lacked the tools needed for a reliable and integrated evaluation of future architectures and workloads.
The Structural Simulation Toolkit (SST) aims address this problem. The SST provides a framework for simulating large-scale HPC systems. This simulator allows parallel simulation of large machines at multiple levels of detail. The SST couples models for processors, memory, and network subsystems. The SST aims, over time, to become a standard simulation environment for designing HPC systems by helping Industry, Academia, and the National Labs in designing and evaluating future architectures.
A quick overview of some key interfaces and data structures in SST can be found here: Key Interfaces
Installation instructions can be found here.
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