16 #ifndef _CORETESTTRACERCOMPONENT_H
17 #define _CORETESTTRACERCOMPONENT_H
19 #include <sst/elements/memHierarchy/memEvent.h>
23 using namespace SST::MemHierarchy;
26 namespace CoreTestTracerComponent {
32 SST_ELI_REGISTER_COMPONENT(
35 "coreTestRNGComponent",
36 SST_ELI_ELEMENT_VERSION(1,0,0),
37 "Random number generation component",
38 COMPONENT_CATEGORY_UNCATEGORIZED)
40 SST_ELI_DOCUMENT_PARAMS(
41 {
"seed_w",
"The seed to use for the random number generator",
"7" },
42 {
"seed_z",
"The seed to use for the random number generator",
"5" },
43 {
"seed",
"The seed to use for the random number generator.",
"11" },
44 {
"rng",
"The random number generator to use (Marsaglia or Mersenne), default is Mersenne",
"Mersenne"},
45 {
"count",
"The number of random numbers to generate, default is 1000",
"1000" },
46 {
"verbose",
"Sets the output verbosity of the component",
"0" },
50 SST_ELI_DOCUMENT_STATISTICS(
54 SST_ELI_DOCUMENT_PORTS(
63 bool clock(SST::Cycle_t);
64 void FinalStats(FILE*,
unsigned int);
65 void PrintAddrHistogram(FILE*, vector<SST::MemHierarchy::Addr>);
66 void PrintAccessLatencyDistribution(FILE*,
unsigned int);
78 unsigned int pageSize;
79 unsigned int accessLatBins;
90 vector<SST::MemHierarchy::Addr>AddrHist;
91 vector<unsigned int> AccessLatencyDist;
93 map<MemEvent::id_type,uint64_t>InFlightReqQueue;
Output object provides consistent method for outputting data to stdout, stderr and/or sst debug file...
Definition: output.h:54
A class to convert between a component's view of time and the core's view of time.
Definition: timeConverter.h:25
Main component object for the simulation.
Definition: component.h:31
Parameter store.
Definition: params.h:44
Definition: coreTest_TracerComponent.h:28
Link between two components.
Definition: link.h:32